Conducting Harmonics & Power Quality Studies

Given a site with non-linear loads and a connection agreement, run the study in this order:

1. Characterize loads → build harmonic current spectrum per load (from datasheets, IEC 61000-3-2/-12 emission limits, or measurement).
2. Model the system → source impedance at PCC, transformer/cable impedance, existing PF correction capacitors (resonance risk).
3. Calculate/measure THD & individual harmonics at the Point of Common Coupling (PCC) and Point of Evaluation (PoE).
4. Compare against limits → ENA G5/5 (UK planning levels), BS EN 50160 (supply voltage characteristics), IEEE 519 (if no UK limit applies).
5. If exceeded → recommend mitigation (passive filter, active filter, line reactors, phase shifting, isolation transformer) and re-verify compliance.

Output a compliance table: Harmonic order | Measured/Calculated % | Planning Level | Compliant Y/N.

Progress:
- [ ] Step 1: Gather load data and site single-line diagram
- [ ] Step 2: Determine applicable standards and limits
- [ ] Step 3: Build/collect harmonic spectra for each load
- [ ] Step 4: Model network impedance and identify resonance points
- [ ] Step 5: Calculate voltage/current harmonic distortion at PCC
- [ ] Step 6: Compare results against planning/compatibility levels
- [ ] Step 7: If non-compliant, design mitigation measure
- [ ] Step 8: Re-verify post-mitigation and document findings

Step 1: Gather Load Data

Collect for each non-linear load:

• Rated power (kW/kVA), type (VSD, UPS, rectifier, EV charger, LED, arc furnace, etc.)
• Manufacturer harmonic spectrum (current distortion by order, %THDi) — request if not supplied
• Diversity/loading factor (harmonics scale with load level, not just rated current)
• Connection point in the network (which busbar, which transformer)

If no manufacturer data exists, use typical spectra for the load class (6-pulse VSD, 12-pulse, switch-mode PSU) as a conservative estimate, flagged as an assumption.

Step 2: Determine Applicable Standards

Default hierarchy for UK work:

1. ENA Engineering Recommendation G5/5 (or latest revision) — UK planning levels for harmonic voltage distortion at LV/HV/EHV, and the assessment methodology (Stage 1/2/3 assessment).
2. BS EN 50160 — voltage characteristics of public distribution networks (compatibility levels).
3. BS EN 61000-3-2 / -3-12 — emission limits for equipment ≤16A / >16A≤75A per phase.
4. BS EN 61000-3-3 / -3-11 — voltage fluctuation/flicker limits, if flicker also in scope.
5. DNO/DNO-specific requirements — check the relevant Distribution Network Operator's connection conditions; they may impose stricter G5/5-based limits.

Where UK standards don't cover the scenario (e.g., large industrial converters, HVDC, offshore, specific inter-harmonics, or MV/HV connection studies not fully detailed in G5/5):

• IEEE 519 — recommended practice for harmonic control, current/voltage distortion limits by SCR (short circuit ratio).
• IEC 61000-4-7 — measurement methods and interharmonics.
• IEC 61000-3-6 / -3-7 — MV/HV emission limit assessment methodology (complements G5/5 Stage 2/3 approach).

State explicitly in the report which standard covers which part of the assessment, and flag any gap-filling with international standards.

Step 3: Build Harmonic Spectra

Express each load's harmonic current as % of fundamental, at each order (2nd–50th typically; consider higher/interharmonics for modern SMPS/EV chargers if relevant). Aggregate multiple loads using vector or arithmetic summation per G5/5 Appendix/IEC 61000-3-6 diversity guidance — don't just add arithmetically without applying diversity factors, this overstates the problem.

Step 4: Model Network Impedance

• Source impedance at PCC: from DNO fault level data (Ohm's law: Z = V²/Sfault).
• Include transformer impedance (%Z from nameplate), cable/line impedance for the relevant length.
• Check for resonance: parallel resonance between supply inductance and any PF correction capacitance.
  • Resonant order: h_r = √(Ssc / Qc), where Ssc = fault level (kVA), Qc = capacitor bank rating (kVAr).
  • Flag if h_r lands near a dominant harmonic order (5th, 7th, 11th) — high risk of amplification.

Step 5: Calculate Distortion

• Individual harmonic voltage: Vh = Ih × Zh (at that harmonic's frequency, Zh = h × Z1 approx, adjust for skin effect on cables at higher orders).
• THDv = √(Σ Vh²) / V1 × 100%
• THDi similarly for current.
• If measured data available (power quality analyzer, per IEC 61000-4-7/-4-30 Class A), use recorded 10-minute aggregated values (95th percentile over the week per G5/5 methodology), not instantaneous peaks.

Step 6: Compare to Limits

Use G5/5 Stage 1 (simple check against planning levels by voltage level) first. If load contribution is significant relative to available headroom (typically >the load's allocated capacity per the "fair share" allocation method), escalate to Stage 2 (detailed assessment with actual network impedance) or Stage 3 (network operator involvement for large connections).

Typical LV planning levels (indicative — always confirm current G5/5 revision):

Step 7: Mitigation Design (if non-compliant)

Select based on dominant harmonic order, load type, and cost/space constraints:

Always re-run Step 5 calculation with the mitigation's expected attenuation applied, to confirm compliance margin — don't just assert the fix works.

Step 8: Document

Report structure:

1. Executive summary (compliant/non-compliant, key risk)
2. Site description and single-line diagram
3. Load harmonic data and assumptions
4. Standards applied and rationale
5. Calculation methodology and results (table by harmonic order)
6. Resonance analysis
7. Mitigation recommendation with predicted post-mitigation performance
8. Conclusions and any conditions (e.g., recommend re-measurement after commissioning)

Example 1: Input: 250kW 6-pulse VSD connecting to a 500kVA LV transformer supply, DNO fault level at PCC 8MVA, no existing PFC capacitors. Output:

• Load THDi (typical 6-pulse, no reactor): ~35%, dominant 5th (~30%) and 7th (~10%)
• Zsource at PCC calculated from 8MVA fault level; THDv estimate ~6.2% → exceeds 5% G5/5 LV planning level
• Resonance check: no PFC capacitors present, no parallel resonance risk
• Recommendation: add 3% AC line reactor → reduces THDi to ~18%, recalculated THDv ~3.8% → compliant. Note as cheaper alternative to passive filter given single dominant load.

Example 2: Input: Industrial site with 400kVAr PFC capacitor bank and multiple VSDs, fault level 6MVA, complaints of nuisance tripping. Output:

• Resonant harmonic order h_r = √(6000/400) ≈ 3.87 → close to 5th harmonic risk zone but more critically near dominant low-order components
• Flag high risk of resonance amplification; recommend converting capacitor bank to detuned (tuned to ~4.2x, i.e., below 5th) filter rather than plain PFC
• Re-assessment after retrofit shows THDv reduced from 9.1% to 4.3% → compliant with G5/5